Modern homogeneous and heterogeneous multi-core and many-core architectures are now part of the high-end and mainstream computing scene and can offer impressive performance for various applications. This architecture trend has been driven by the need to reduce power consumption, increase processor utilization, and deal with the memory-processor speed gap. However, the complexity of these new architectures created several programming challenges and achieving performance on these systems is a difficult task. This topic seeks to explore productive programming of Multi-Core (MC), Many Integrated Cores (MIC), and hybrid systems with accelerators (GPUs). It focus on novel research and solutions in the form of programming models, languages, compilers, libraries, runtime and analysis tools to increase the programmability of multicore, manycore, and hybrid systems, in the context of general-purpose parallel computing, including HPC.
Global Chair
Raymond Namyst, University of Bordeaux 1, France
Local Chair
Ricardo Rocha, University of Porto, Portugal
Further Members
Christoph Kessler, University of Linköpîng, Sweden
Elisabeth Larsson, Uppsala University, Sweden
Frank Mueller, North Carolina State University, USA
Jean-François Méhaut, Grenoble University, France
Jesper Traff, Vienna University of Technology, Austria
Marco Aldinucci, University of Torino, Italy
Mitsuhisa Sato, University of Tsukuba, Japan